The present invention relates generally to digital circuits, and more specifically, to flip-flops used in digital circuits.
Flip-flops are used as storage elements in digital circuits for storing data. A flip-flop circuit has an input stage for receiving a data input signal, a clock input for receiving a clock signal, and an output stage for generating an output signal. The output stage latches the input signal based on the active edge of the clock signal.
Various electrical components in a digital circuit may operate in different voltage domains. If the flip-flop circuit is connected to an electrical component that operates in a different voltage domain, a level shifter is required to shift-up or shift-down the voltage level of the output signal of the flip-flop circuit. A conventional flip-flop circuit 102 with an external level shifter 104 is illustrated in FIG. 1. The flip-flop circuit 102 includes an input terminal D 106, a clock input terminal CLK 108, an output terminal Q 110, and an inverted output terminal /Q 112. The level shifter 104 includes a first field effect transistor (FET) 114a, a second FET 114b, a third FET 116a, and a fourth FET 116b. The first FET 114a and the second FET 114b may be p-channel FETs (p-FET). The third FET 116a and the fourth FET 116b may be n-channel FETs (n-FET). The source terminals of the first and second FETs 114a and 114b are connected together. The gate terminal of the first FET 114a is connected to the drain terminal of the fourth FET 116b. The gate terminal of the second FET 114b is connected to the drain terminal of the third FET 116a. The output terminal Q 110 is connected to the gate terminal of the third FET 116a and the inverted output terminal /Q 112 is connected to the gate terminal of the fourth FET 116b. 
The level shifter 104 shifts-up the output signal of the flip-flop circuit 102 and provides the level shifted output to the next stage of the digital circuit. However, such a flip-flop circuit with an external level shifter increases the chip area, thereby increasing the cost of fabrication. Moreover, use of an external level shifter increases the power consumption in an electronic circuit.